Synopsys and ARM Collaborate to Accelerate AMBA AXI Adoption With DesignWare Verification IP

AMBA AXI technology is a next-generation on-chip interface that enables the easy creation of efficient, high frequency designs, which maximize the use of interconnect resources leading to very high data-throughput. AMBA AXI technology supports multi-layer interconnect designs and provides 1.6GBytes/s per layer data-throughput at 200MHz. These designs will require a combination of the new AMBA AXI interface specification and external industry-standard interfaces like USB 2.0 and PCI Express technology. With this addition, DesignWare Library products will provide engineers with a complete AMBA AXI verification environment for AMBA AXI interface-based SoCs, reducing their time-to-market and helping to ensure right-first-time designs of advanced, high-performance core-based SoCs.

Synopsys DesignWare Verification IP can help designers save a substantial amount of testbench development effort. It further enables verification engineers to move toward higher-level testbench functionality with built-in support for coverage-driven constrained-random test verification including features expected to be published in the SystemVerilog Verification Methodology Manual, jointly created by ARM and Synopsys.

"We are working closely with Synopsys to ensure that the AMBA AXI technology-based DesignWare solution is fully compliant with the XVC methodology, enabling, ARM to deliver verification vectors that run 'out of the box'," said John Cornish, director, Product Marketing, at ARM. "By adding AMBA AXI Verification IP to the DesignWare Library products, Synopsys is helping ensure that designers creating AMBA AXI technology-based SoCs will have a high-quality, low-risk solution with strong technical support that scales from block-level verification through subsystem to complete SoC verification."

"The collaboration with ARM to extend our popular AMBA 2.0 technology-based DesignWare solution to include AMBA AXI Verification IP will help enable designers to push performance limits in their high-speed designs," said Guri Stark, vice president of Marketing, Solutions Group at Synopsys. "SoC designers will be able to use not only the AMBA AXI technology-based DesignWare Verification IP, but also the extensive AMBA 2.0 bus and peripheral implementation and verification IP already in use by hundreds of companies."

Multiple companies have been using the AMBA AXI technology-based DesignWare Verification IP on their production high-performance designs. By relying on DesignWare Verification IP, these design teams have been able to focus on verifying their designs in the context of the interfaces, instead of debugging both designs and models. As part of an overall verification methodology that leverages the Vera(R) testbench automation tool, the Reference Verification Methodology and DesignWare VIP, Synopsys' Discovery(TM) Verification Platform customers using this combination of tools and verification IP have greatly improved their productivity.

Pricing and Availability

The AMBA AXI technology-based DesignWare Verification IP is currently in use by early adopters and is planned to be generally available in calendar Q4 2004 and will be included in the DesignWare Library and DesignWare Verification Library products. Customers who currently own a DesignWare Library or DesignWare Verification Library license will be able to use the new IP for no additional cost. DesignWare Library and DesignWare Verification Library (a subset of the DesignWare Library) are available on a subscription or perpetual license basis.

About DesignWare Verification IP

The DesignWare Verification Library provides the industry's broadest portfolio of design-proven, high-quality, standards-based verification IP helping designers save testbench development time and reach functional coverage goals faster. DesignWare Verification IP offers advanced functionality for block and chip-level verification and is an integral part of the Synopsys Discovery(TM) Verification Platform.

DesignWare Verification IP is fully functional in Vera, Verilog and VHDL verification environments and works with every major simulator. The DesignWare Verification Library includes: PCI-Express, PCI-X(R), PCI, USB 1.1/2.0/On- the-Go, AMBA 2.0, AMBA AXI, 10/100/1G/10G Ethernet, I2C, Serial I/O, over 10,000 memory models and Star IP Processor and DSP Cores. For a complete directory of Synopsys' IP visit: http://www.synopsys.com/ipdirectory. For more information on DesignWare IP, visit: http://www.designware.com/ or call 1-877-4BEST-IP

About ARM

ARM designs the technology that lies at the heart of advanced digital products, from wireless, networking and consumer entertainment solutions to imaging, automotive, security and storage devices. ARM's 16/32-bit RISC microprocessors, data engines, peripherals, software and tools, combined with the company's broad Partner community, provide a total system solution that offers a fast, reliable path to market for leading electronics companies. More information on ARM is available at http://www.arm.com/.

About Synopsys

Synopsys, Inc. is the world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.

Forward Looking Statements

This press release contains forward-looking statements within the meaning of the safe harbor provisions of Section 21E of the Securities Exchange Act of 1934, including statements regarding the expected date of availability and expected benefits of the AMBA AXI technology-based DesignWare Verification IP and features expected to be included in the SystemVerilog Verification Methodology Manual jointly created by ARM and Synopsys. These statements are based on ARM's and Synopsys' current expectations and beliefs. Actual results could differ materially from the results implied by these statements as a result of unforeseen difficulties in completing the AMBA AXI technology-based DesignWare Verification IP product or the methodology and uncertainties attendant to development of any product and verification methodology, as well as factors described in the reports filed by ARM and Synopsys with the United States Securities and Exchange Commission.

NOTE: Synopsys, DesignWare and Vera are registered trademarks and Discovery is a trademark of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

ARM is a registered trademark of ARM Limited. AMBA is a trademark of ARM Limited. All other brands or product names are the property of their respective holders. "ARM" is used to represent ARM Holdings plc; its operating company ARM Limited; and the regional subsidiaries ARM INC.; ARM KK; ARM Korea Ltd.; ARM Taiwan; ARM France SAS; ARM Consulting (Shanghai) Co. Ltd.; and ARM Belgium N.V.

CONTACT: Troy Wood of Synopsys, Inc., +1-650-584-5717, or
twood@synopsys.com; or Andrea Zils of Edelman, +1-650-429-2731, or
andrea.zils@edelman.com, for Synopsys; or Michelle Spencer of ARM,
+44-1628-427780, or michelle.spencer@arm.com

Web site: http://www.arm.com/

Web site: http://www.synopsys.com/